GReasy reached the milestone of of supporting RFNoC for USRP X310 devices
GReasy rapid compilation of FPGA designs is now possible with the RFNoC module library on the USRP X310.
Blacksburg, VA - November 26, 2014 - The CCM Lab is announcing today that GReasy has reached its major milestone with RFNoC support. On November 24th, initial experiments were performed which confirmed this fact. Radio bring up time from starting GReasy compilation to using the USRP is about 1:30. This includes the USRP set up time and the ~30 seconds to program the device.
GReasy enables a rapid, “slotless” module placement in a continuous region in which about 30% of the device resources are allocated. The region contains 3 CE ports which can each be connected to an RFNoC module. Initial tests have targeted a selection of RFNoC modules, including AXI_LOOPBACK_FIFO, FIR_FILTER, and ADDSUB, but most RFNoC modules available have been pre-compiled. Further testing is required on the additional modules. Our tests also confirmed that GReasy can compile 200MHz radio design.
GReasy is a standalone compilation flow that is well integrated with a slightly modified RFNoC-enabled GNURadio and requires only minor modification to the open-source USRP FPGA image. Support for LabVIEW is being currently investigated.
We believe that GReasy could be beneficial to the radio community. Especially in the area of rapid prototyping. With this milestone, GReasy reached the maturity level that is ready for public release. We are planning to make GReasy available to the radio community.
GReasy Team @ CCMLab