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HDL Style Analysis

athanas's picture

While it's quite possible to hammer away at HDL coding and get something "working," yet if bad coding techinques are used, the resulting product may be marginally stable, wasteful, power inefficient, or low performance.  Prior to synthesis, it's good to have a second opinion on the quality of your code.  A Cadence product called HAL provides this capability.  HAL is a tool that analyzes your code for common mistakes, and summarizes them in a GUI interface.  A description of HAL from the Cadence Incisive Users Guide:

Detecting RTL issues early in the design cycle lets you fix them before functional verification and eliminates the costly step of having to go back and edit your RTL to address a style or synthesis issue and then having to completely re-verify the design. To detect the RTL issues, HAL offers you the following features:

  • Strong Rule-set—HAL performs a variety of checks under different domains to help speed up the design of complex SoCs and ASICs. See Introduction to Built-in Checks in HAL on page 25 for more details.

  • Detailed Message for Easy Debug—The violations are reported as short messages with enough information to localize the issues quickly.

  • Rule Customization—HAL provides a powerful set of customization facilities to meet corporate, team-wide, and user-specific design purification or linting requirements.

  • Extensive Language Support—HAL runs on Verilog, SystemC, or e source files or elaborated Verilog, VHDL or Mixed Language designs.

  • Report Generation—Creates reports of the errors and messages contained in the log file.

  • Graphical User Interface for Detailed Message Analysis—You can use the NCBrowse Message Browser to display errors and messages contained in the log file and analyze them in detail.

  • Schematic View for Structural Checks—HAL helps you in easy debugging of the each rule violation with the help of Simvision Schematic Tracer.

  • Graphical User Interface for Rule Customization—The HAL Rules File Editor offers ease- of-use and click and drag features to edit or create a new rules file. 

To analyze your code, first set the appropriate environment variables by:

source /opt/system/software/Cadence/hal_setup.sh

You can put this in your ~/.bashrc file to make life easier.  Then, use the command analyze to analyze your code.  You can analyze Verilog code, VHDL code, or a mixture of both:

analyze A.v LIST.v OF.v YOUR.vhd SYNTHESIZABLE.v HDL.vhd CODE.v

When complete, a window will pop up:

To get more information on how to use HAL, click on Help ->  Related Technology -> HAL Users Guide.  If you don't understand why HAL is unhappy with your code, click on Help -> Related Technology -> HAL Reference.

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